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system verilog uvm Jobs

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SOC Verification Engineer- System Verilog UVM - VHDL/Verilog
Posted 12/15/2021
San Jose, CA
Full-time
$150k - $275k
If you are a SOC Verification Engineer- System Verilog UVM with experience, please read on! What You Will Be Doing This position works as a Verification engineer with SOC's for ASIC and FPGA. We real...
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  • System Verilog UVM
  • UVM
  • VHDL/Verilog
  • Verification Engineer
  • FPGA
Director of ASIC Verification - System Verilog, UVM
Posted 06/21/2022
San Jose, CA
Full-time
$200k - $250k
If you are a Director of ASIC Verification with experience, please read on! Job Title: Director of ASIC Verification Job Location: San Jose, CA Compensation: $200K - $250K base Depending on expe...
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  • System Verilog
  • UVM
  • ASIC Verification
  • SoC Verification
  • System Architecture
FULLY REMOTE SOC Design Verification Engineer - SystemVerilogUVM
Posted 06/22/2022
San Diego, CA
Full-time
$150k - $250k
If you are a FULLY REMOTE SOC Design Verification Engineer - SystemVerilogUVM with experience, please read on! Based in the Bay Area, we are an innovative company that collaborates with Fortune 100 c...
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  • UVM
  • System Verilog
  • System Verilog UVM
  • Design Verification
  • Design Verification Engineer
FULLY REMOTE SOC Design Verification Engineer - SystemVerilogUVM
Posted 06/22/2022
Denver, CO
Full-time
$150k - $250k
If you are a FULLY REMOTE SOC Design Verification Engineer - SystemVerilogUVM with experience, please read on! Based in the Bay Area, we are an innovative company that collaborates with Fortune 100 c...
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  • UVM
  • System Verilog
  • System Verilog UVM
  • Design Verification
  • Design Verification Engineer
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Verification Engineer-System Verilog UVM
Posted 03/07/2022
Austin, TX
Full-time
$110k - $200k
If you are a Verification Engineer-System Verilog UVM with experience, please read on! What You Will Be Doing Working with 3 of the top 100 companies in the world Job Title: Design Verification Engin...
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  • Verilog
  • VHDL/Verilog
  • Verification Engineer
  • FPGA
  • FPGA Verification
Verification Engineer-System Verilog UVM
Posted 02/09/2022
Redmond, WA
Full-time
$110k - $200k
If you are a Verification Engineer-System Verilog UVM with experience, please read on! What You Will Be Doing Working with 3 of the top 100 companies in the world Job Title: Design Verification Engin...
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  • Verilog
  • VHDL/Verilog
  • Verification Engineer
  • FPGA
  • FPGA Verification
FULLY REMOTE- SR. Verification Engineer-System Verilog UVM
Posted 06/14/2022
Austin, TX
San Diego, CA
Dallas, TX
Denver, CO
Seattle, WA
Full-time
$110k - $250k
If you are a SR. Verification Engineer-System Verilog UVM with experience, please read on! What You Will Be Doing THESE POSITIONS ARE FOREVER FULLY REMOTE, I HAVE POSITIONS FROM MID LEVEL TO PRINICPAL...
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  • Verilog
  • VHDL/Verilog
  • Verification Engineer
  • FPGA
  • FPGA Verification
Verification Engineer-System Verilog UVM - VHDL/Verilog
Posted 03/07/2022
San Jose, CA
Full-time
$180k - $275k
If you are a Verification Engineer-System Verilog UVM with experience, please read on! What You Will Be Doing Working with 3 of the top 100 companies in the world Job Title: Design Verification Engin...
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  • Verilog
  • VHDL/Verilog
  • Verification Engineer
  • FPGA
  • FPGA Verification
REMOTE Design Verification Engineer
Posted 04/27/2022
Remote Position
Full-time
$175k - $200k
If you are a REMOTE Design Verification Engineer with CPU design verification experience, please read on! Job Title: REMOTE Design Verification Engineer Job Location: REMOTE - our HQ is in Los Gat...
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  • UVM
  • Verilog
  • System Verilog
  • SoC Verification
  • ASIC Verification
FULLY REMOTE- SR. Verification Engineer-System Verilog UVM
Posted 03/30/2022
Remote Position
Full-time
$110k - $250k
Work on fantastic projects,100 % fully remote now and permanently! Accepting mid-level to principal level candidates! Fantastic salaries & quick interview process! What You Will Be Doing Job Title: D...
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  • System Verilog
  • UVM
  • VHDL
  • Verification Engineer
  • FPGA
REMOTE Senior Staff Digital DFT Engineer
Posted 05/20/2022
Remote Position
Full-time
$150k - $200k
Job Title: Senior Staff Digital DFT Engineer Location: REMOTE Salary: $150k -$200k DOE Requirements: DFT/DFD, System Verilog The design team here develops various application specific customer...
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  • System Verilog
  • UVM
  • Tessent Tool
  • Verification
  • LBIST
Principal ASIC Design & Verification Engineer - UVM
Posted 06/22/2022
Andover, MA
Full-time
$120k - $175k
Job Title: Principal ASIC Design & Verification Engineer - C++ Job Location: Andover, MA Job Salary: $120k - $175k + Bonus + Benefits + an incredible RSU package - $200k - $300k Total Package Requ...
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  • UVM
  • System Verilog
  • Vérification
  • ASIC
  • ASIC Design
Senior Verification Engineer - ASIC, C++
Posted 06/22/2022
Andover, MA
Full-time
$120k - $175k
Job Title: Senior Verification Engineer - ASIC Verification, C++ Job Location: Andover, MA Job Salary: $120k - $175k + Bonus + Benefits + an incredible RSU package - $200k - $300k Total Package Re...
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  • UVM
  • System Verilog
  • Vérification
  • ASIC
  • ASIC Design
Staff Verification Engineer - UVM - $300k - $350k Total Comp
Posted 06/27/2022
San Jose, CA
Allentown, PA
Full-time
$160k - $200k
Job Title: Staff Verification Engineer Job Location: San Jose, CA or Allentown, PA Job Salary: $160k - $200k + Bonus + Benefits + an incredible RSU package - $300k - $350k total comp Requirements:...
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  • UVM
  • System Verilog
  • Verification Engineer
  • Verification
  • RTL Design
Senior Verification Engineer - $300k - $350k+ Total Comp
Posted 06/27/2022
San Jose, CA
Allentown, PA
Full-time
$160k - $200k
Job Title: Senior Verification Engineer Job Location: San Jose, CA or Allentown, PA Job Salary: $160k - $200k + Bonus + Benefits + an incredible RSU package - $300k - $350k total comp Requirements...
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  • UVM
  • System Verilog
  • Verification Engineer
  • Verification
  • RTL Design
Principal Verification Engineer - UVM - $160k - $200k+
Posted 06/27/2022
San Jose, CA
Allentown, PA
Full-time
$160k - $200k
Job Title: Principal Verification Engineer Job Location: San Jose, CA or Allentown, PA Job Salary: $160k - $200k + Bonus + Benefits + an incredible RSU package - $300k - $350k total comp Requireme...
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  • UVM
  • System Verilog
  • Verification Engineer
  • Verification
  • RTL Design
REMOTE Sr. Pre-Silicon Verification Engineer
Posted 06/21/2022
Remote Position
Full-time
$150k - $200k
If you are a Sr. Pre-Silicon Verification Engineer with experience, please read on! Job Title: Sr. Pre-Silicon Verification Engineer Job Location: REMOTE - preference for candidates in the Portlan...
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  • UVM
  • System Verilog
  • Pre-Silicon Verification
  • Digital Verification
  • RTL
 
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