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system verilog uvm Jobs

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FULLY REMOTE-Design Verification Engineer-SystemVerilog UVM-ASIC
Posted 03/10/2023
Austin, TX
San Diego, CA
San Jose, CA
Denver, CO
Seattle, WA
Full-time
$140,000.00 - $240,000.00
If you are a FULLY REMOTE-Design Verification Engineer-System Verilog UVM- ASIC with experience, please read on! What You Will Be Doing THESE POSITIONS ARE FOREVER FULLY REMOTE, I HAVE POSITIONS FROM...
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  • Verilog
  • System Verilog
  • UVM
  • System Verilog UVM
  • Verification Engineer
Design Verification Engineer- System Verilog UVM- ASIC
Posted 02/21/2023
Milpitas, CA
San Jose, CA
Sunnyvale, CA
San Francisco, CA
Fremont, CA
Full-time
$140,000.00 - $215,000.00
If you are a Design Verification Engineer- System Verilog UVM- ASIC with experience, please read on! What You Will Be Doing (THIS POSITION REPORTS TO MILPITAS 3 DAYS A WEEK AND IS PARTIAL REMOTE, SIGN...
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  • System Verilog UVM
  • UVM
  • System Verilog
  • Design Verification Engineer
  • Design Verification
Remote Senior Design Verification - System Verilog, UVM, ASIC
Posted 03/01/2023
San Jose, CA
Houston, TX
Atlanta, GA
Boston, MA
Portland, OR
Full-time
$150,000.00 - $240,000.00
If you are a Sr Design Verification with experience, please read on! (THIS POSITION IS FOREVER REMOTE - WE HAVE MANY OPEN POSITIONS FROM MID LEVEL TO PRINCIPAL) We are producing the most cutting e...
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  • System Verilog
  • UVM
  • ASIC
Hybrid FPGA Design Engineer- RTL, System Verilog, Xilinx
Posted 03/13/2023
Milpitas, CA
Oakland, CA
Mountain View, CA
Full-time
$180,000.00 - $250,000.00
If you are a FPGA Design Engineer- RTL Development-System Verilog with experience, please read on! We are a system on a chip company formed in March 2015 we have about 2,500 employees worldwide, our...
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  • System Verilog
  • UVM
  • Verilog
  • FPGA
  • RTL
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Hybrid FPGA Design Engineer- RTL, System Verilog, Xilinx
Posted 03/13/2023
Milpitas, CA
Sunnyvale, CA
San Francisco, CA
Full-time
$180,000.00 - $250,000.00
If you are a FPGA Design Engineer- RTL Development-System Verilog with experience, please read on! We are a system on a chip company formed in March 2015 we have about 2,500 employees worldwide, our...
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  • System Verilog
  • UVM
  • Verilog
  • FPGA
  • RTL
FULLY REMOTE - Design Verification Engineer
Posted 02/17/2023
San Diego, CA
San Francisco, CA
New York, NY
Austin, TX
Chicago, IL
Full-time
$150,000.00 - $240,000.00
If you are a FULLY REMOTE - Design Verification Engineer with experience, please read on! What You Will Be Doing THESE POSITIONS ARE FOREVER FULLY REMOTE, I HAVE POSITIONS FROM MID LEVEL TO PRINICPAL...
Apply Now
  • System Verilog
  • UVM
  • Design Verification
  • OVM
Remote Design Verification Engineer - ASIC, UVM, System Verilog
Posted 03/13/2023
San Francisco, CA
Redmond, WA
Austin, TX
Full-time
$160,000.00 - $225,000.00
If you are a Design Verification Engineer with experience, please read on! We are a fortune 100 company located in Beautiful Redmond WA, and we produce some of the highest quality products on the mar...
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  • UVM
  • System Verilog
  • ASIC
  • SOC
  • Design Verification
Design Verification Engineer - System Verilog, UVM, ASIC
Posted 02/23/2023
Milpitas, CA
Full-time
$140,000.00 - $215,000.00
If you are a Design Verification Engineer with experience, please read on! THIS POSITION REPORTS TO MILPITAS 3 DAYS A WEEK AND IS PARTIAL REMOTE, SIGN ON BONUSES ARE AVAILABLE TO HELP MOVE TO THE AREA...
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  • System Verilog
  • UVM
  • ASIC
  • Chip verification
  • RTL
Principal Design Verification Engineer - UVM / SystemVerilog
Posted 03/10/2023
Irvine, CA
San Jose, CA
Full-time
$200,000.00 - $350,000.00
Job Title: Principal Verification Engineer Job Location: Irvine, CA or San Jose, CA Job Salary: $150k - $190k + Bonus + Benefits + an incredible RSU package - $200k - $350k Total Package Requireme...
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  • UVM
  • System Verilog
  • C++
  • Verification Engineer
  • Ethernet
Sr. ASIC Design Verification Engineer - UVM, SystemVerilog, SVAs
Posted 03/10/2023
San Diego, CA
San Jose, CA
Full-time
$200,000.00 - $350,000.00
Job Title: Sr. ASIC Verification Engineer Job Location: San Jose, CA or San Diego, CA Job Salary: $150k - $190k + Bonus + Benefits + an incredible RSU package - $200k - $350k Total Package Require...
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  • UVM
  • System Verilog
  • C++
  • Verification Engineer
  • Ethernet
Sr. ASIC Design Verification Engineer
Posted 03/03/2023
San Jose, CA
Full-time
$150,000.00 - $215,000.00
If you are a Sr. ASIC Design Verification Engineer with experience, please read on! Job Title: Sr. ASIC Design Verification Engineer Job Location: San Jose, CA Compensation: $150K - $215K+ base...
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  • System Verilog
  • UVM
  • Design Verification
  • ASIC
  • SOC
Senior Verification Engineer - $250k - $350k+
Posted 02/27/2023
Andover, MA
Full-time
$120,000.00 - $175,000.00
Job Title: Senior Verification Engineer Job Location: Andover, MA Job Salary: $120k - $175k + Bonus + Benefits + an incredible RSU package - $200k - $350k Total Package Requirements: Verification,...
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  • UVM
  • System Verilog
  • ASIC
  • Verification
  • ASIC Design
Staff RTL Verification Engineer - UVM, RTL - $200k - $350k
Posted 02/27/2023
Andover, MA
Boston, MA
Full-time
$250,000.00 - $350,000.00
Job Title: Staff / Principal Verification Engineer - ASIC Verification, UVM, C++ Job Location: Andover, MA - hybrid Job Salary: $120k - $175k + Bonus + Benefits + an incredible RSU package - $200k -...
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  • UVM
  • System Verilog
  • ASIC
  • ASIC Design
  • C++
Senior / Staff RTL Verification Engineer - UVM - $250k - $350k+
Posted 02/27/2023
Andover, MA
Full-time
$150,000.00 - $200,000.00
Job Title: Senior / Staff RTL Verification Engineer Job Location: Andover, MA Job Salary: $150k - $180k + Bonus + Benefits + an incredible RSU package - $200k - $350k Total Package Requirements: V...
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  • UVM
  • System Verilog
  • Vérification
  • ASIC
  • ASIC Design
Hybrid Design Verification Engineer - UVM, silicon IC
Posted 02/24/2023
Los Angeles, CA
Dallas, TX
Chicago, IL
Redmond, WA
Denver, CO
Full-time
$160,000.00 - $220,000.00
If you are a Design Verification Engineer with experience, please read on! Top Reasons to Work with Us Work with fantastic technologies! Great salary & fantastic bonus structure 12-20% of annual salar...
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  • UVM
  • System Verilog
  • silicon IC
  • Chip verification
  • Perl
Senior Verification Engineer - $200k - $350k+
Posted 02/27/2023
Andover, MA
Full-time
$120,000.00 - $175,000.00
Job Title: Senior Verification Engineer Job Location: Andover, MA Job Salary: $120k - $175k + Bonus + Benefits + an incredible RSU package - $200k - $350k Total Package Requirements: Verification,...
Apply Now
  • UVM
  • System Verilog
  • ASIC
  • ASIC Design
  • C++
Principal Digital Design Engineer
Posted 02/02/2023
Portland, OR
Allentown, PA
Full-time
$150,000.00 - $215,000.00
If you are a Principal Digital Design Engineer with experience, please read on! Job Title: Principal Digital Design Engineer Job Location: Portland, OR or Allentown, PA - relocation assistance off...
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  • System Verilog
  • UVM
  • Digital IC Design
  • RTL Design
  • Digital Verification
Pre-Silicon Verification Engineer - ASIC, System Verilog, UVM
Posted 03/17/2023
Roseville, CA
Sacramento, CA
Antioch, CA
Elk Grove, CA
Walnut Creek, CA
Full-time
$140,000.00 - $155,000.00
Job Title: ASIC Pre-Silicon Verification Engineer Job Location: Hybrid (Sacramento preferred, Bay Area ok, relocation offered) Salary Range: $145,000 to $155,000 Requirements: ASIC Verification/De...
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  • System Verilog
  • UVM
  • Python
  • Electrical Engineering
  • ASIC Verification
Sr. Digital IC Design Engineer
Posted 02/02/2023
Vancouver, WA
San Jose, CA
Allentown, PA
Colorado Springs, CO
Full-time
$150,000.00 - $215,000.00
Job Title: Sr. Digital IC Design Engineer Job Location: Vancouver, WA, San Jose, CA, Colorado Springs, CO, or Allentown, PA - relocation assistance offered! Compensation: $150K - $215K+ base Dependi...
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  • System Verilog
  • UVM
  • Digital IC Design
  • RTL Design
  • Digital Verification
Sr. Pre-Silicon Verification Engineer
Posted 02/03/2023
Portland, OR
Allentown, PA
Full-time
$150,000.00 - $200,000.00
If you are a Sr. Pre-Silicon Verification Engineer with experience, please read on! Job Title: Sr. Pre-Silicon Verification Engineer Job Location: Portland, OR or Allentown, PA - relocation assist...
Apply Now
  • UVM
  • System Verilog
  • Pre-Silicon Verification
  • Digital Verification
  • RTL
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