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Design Verification Engineer - System Verilog, SoC

Santa Clara, CA

Compensation Unspecified

Posted 10/03/2019

Located in Santa Clara, CA, we are a startup that is revolutionizing some of the most complex problems in big data analytics, deep learning, and large scale computing by creating the first universal p...

System Verilog
SoC Verification
UVM Sequence / Phases / Callback
Waveform Debugging / RTL Simulation
3rd Party Bus Functional Model Integration

Principal ASIC Verification Engineer

Fremont, CA

Full-time $120k - $200k

Posted 09/09/2019

If you are a Principal ASIC Verification Engineer with experience, please read on! We are located in Beautiful Fremont, CA in the heart of Silicon Valley. We are a cutting edge AI technology company t...

System Verilog
ASIC Design
Asic Fpga
ASIC
C++

Senior FPGA Design Engineer

Pleasanton, CA

Full-time $160k - $225k

Posted 11/05/2019

If you are a Senior FPGA Design Engineer with experience, please read on! Top Reasons to Work with Us We are the world's leading manufacturer of high-quality instrumentation and software for imaging a...

Verilog
FPGA
Electrical Engineering
Quartus
Vivado