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Design Verification Engineer- ASIC, System Verilog UVM
Posted 08/26/2022
Milpitas, CA
Houston, TX
Huntsville, AL
Seattle, WA
Miami, FL
Full-time
$180,000.00 - $240,000.00
If you are a Design Verification Engineer- ASIC, System Verilog UVM with experience, please read on! What You Will Be Doing ((THIS POSITION REPORTS TO THE MILPITAS AREA OF CALIFORNIA AND REQUIRES RELO...
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  • System Verilog UVM
  • UVM
  • ASIC
  • Design Verification Engineer
  • RTL
FULLY REMOTE Design Verification Engineer- System Verilog, UVM
Posted 09/21/2022
Denver, CO
New York, NY
Atlanta, GA
Hillsboro, OR
Tempe, AZ
Full-time
$160,000.00 - $250,000.00
If you are a FULLY REMOTE Design Verification Engineer- System Verilog, UVM, with experience, please read on! What You Will Be Doing - Create different functional test cases to validate independent de...
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  • UVM
  • System Verilog
  • ASIC
  • Design Verification Engineer
  • DV
Remote Senior Design Verification - System Verilog, UVM, ASIC
Posted 12/14/2022
San Jose, CA
Houston, TX
Atlanta, GA
Boston, MA
Portland, OR
Full-time
$150,000.00 - $240,000.00
If you are a Sr Design Verification with experience, please read on! (THIS POSITION IS FOREVER REMOTE - WE HAVE MANY OPEN POSITIONS FROM MID LEVEL TO PRINCIPAL) We are producing the most cutting e...
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  • UVM
  • System Verilog
  • ASIC
Sr FPGA Engineer
Posted 12/14/2022
Irvine, CA
Full-time
$130,000.00 - $150,000.00
If you are a Sr Hardware Engineer with 10+yrs experience FPGA and VHDL, please read on! Top Reasons to Work with Us **Must live within commuting distance, or open to relocate near Rancho Santa Margari...
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  • UVM
  • VHDL
  • FPGA
  • Xilinx
  • Altera
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Design Verification Engineer- System Verilog UVM- ASIC
Posted 01/17/2023
Milpitas, CA
San Jose, CA
Sunnyvale, CA
San Francisco, CA
Fremont, CA
Full-time
$140,000.00 - $215,000.00
If you are a Design Verification Engineer- System Verilog UVM- ASIC with experience, please read on! What You Will Be Doing (THIS POSITION REPORTS TO MILPITAS 3 DAYS A WEEK AND IS PARTIAL REMOTE, SIGN...
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  • System Verilog UVM
  • UVM
  • Design Verification Engineer
  • System Verilog
  • Design Verification
Verification Engineer - PCIe
Posted 11/10/2022
San Jose, CA
Full-time
$160,000.00 - $200,000.00
We are a well recognized fab-less semiconductor company with an expertise in our SerDes IP portfolio. Some of our products include HIWIRE AEC, OPTICAL DSP, LINE CARD AND IP Chips. Over the past year w...
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  • UVM
  • PCIe
  • Verification
  • IP
  • SOC
SOC Design Verification Engineer - ASIC, FPGA, Verilog, VHDL
Posted 01/24/2023
Austin, TX
Santa Clara, CA
San Diego, CA
Dallas, TX
San Francisco, CA
Full-time
$150,000.00 - $250,000.00
If you are a SOC Design Verification Engineer with experience, please read on! ((THIS POSITION REQUIRES RELOCATION -- LOCATIONS MAY VARY, BUT OPPORTUNITIES IN WASHINGTON, BAY AREA AND AUSTIN) Based...
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  • UVM
  • SOC
  • Verification
  • FPGA
  • Verilog
Remote Design Verification Engineer - SystemVerilog, UVM or OVM
Posted 01/23/2023
Austin, TX
San Jose, CA
Seattle, WA
Full-time
$150,000.00 - $225,000.00
If you are a Design Verification Engineer with experience, please read on! We are an innovative company that collaborates with Fortune 100 companies on innovative new technology. This includes autono...
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  • UVM
  • SOC
  • Verification
  • FPGA
  • Verilog
Sr. Design Verification Engineer - RISC-V CPU
Posted 08/02/2022
Cupertino, CA
Austin, TX
Full-time
$150,000.00 - $200,000.00
If you are a Sr. Design Verification Engineer with RISC-V CPU experience, please read on! Job Title: Sr. Design Verification Engineer - RISC-V CPU Job Location: Cupertino, CA or Austin, TX Compe...
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  • UVM
  • Design Verification
  • CPU MicroArchitecture
  • ARM
  • x86
Sr. ASIC Design Verification Engineer
Posted 11/02/2022
San Jose, CA
Full-time
$150,000.00 - $215,000.00
If you are a Sr. ASIC Design Verification Engineer with experience, please read on! Job Title: Sr. ASIC Design Verification Engineer Job Location: San Jose, CA Compensation: $150K - $215K+ base...
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  • UVM
  • Design Verification
  • ASIC
  • SOC
  • System Verilog
Senior Verification Engineer - UVM - $250k - $350k+
Posted 01/27/2023
Andover, MA
Full-time
$120,000.00 - $175,000.00
Job Title: Senior Verification Engineer Job Location: Andover, MA Job Salary: $120k - $175k + Bonus + Benefits + an incredible RSU package - $200k - $350k Total Package Requirements: Verification,...
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  • UVM
  • Vérification
  • ASIC
  • System Verilog
  • ASIC Design
Principal Verification Engineer - UVM, RTL - $200k - $350k
Posted 01/27/2023
Andover, MA
Full-time
$120,000.00 - $175,000.00
Job Title: Principal Verification Engineer - ASIC Verification, UVM, C++ Job Location: Andover, MA Job Salary: $120k - $175k + Bonus + Benefits + an incredible RSU package - $200k - $350k Total Pack...
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  • UVM
  • Vérification
  • ASIC
  • System Verilog
  • ASIC Design
Senior Verification Engineer - $250k - $350k+
Posted 01/27/2023
Andover, MA
Full-time
$120,000.00 - $175,000.00
Job Title: Senior Verification Engineer Job Location: Andover, MA Job Salary: $120k - $175k + Bonus + Benefits + an incredible RSU package - $200k - $350k Total Package Requirements: Verification,...
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  • UVM
  • ASIC
  • Verification
  • System Verilog
  • ASIC Design
Sr. Design Verification Engineer - UVM/OVM- 8 years minimum!
Posted 08/20/2022
San Antonio, TX
Full-time
$130,000.00 - $190,000.00
If you are a Design Verification Engineer with experience, please read on! **Role is located out of Austin, TX** Relocation assistance available! Top Reasons to Work with Us Work on fantastic proje...
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  • UVM
  • OVM
  • C
  • Electrical Engineering
  • Perl
Principal Verification Engineer - $200k - $350k
Posted 01/27/2023
Andover, MA
Full-time
$120,000.00 - $175,000.00
Job Title: Principal Verification Engineer Job Location: Andover, MA Job Salary: $120k - $175k + Bonus + Benefits + an incredible RSU package - $200k - $350k Total Package Requirements: Verificati...
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  • UVM
  • ASIC
  • System Verilog
  • ASIC Design
  • C++
Senior Verification Engineer - $200k - $350k+
Posted 01/27/2023
Andover, MA
Full-time
$120,000.00 - $175,000.00
Job Title: Senior Verification Engineer Job Location: Andover, MA Job Salary: $120k - $175k + Bonus + Benefits + an incredible RSU package - $200k - $350k Total Package Requirements: Verification,...
Apply Now
  • UVM
  • ASIC
  • System Verilog
  • ASIC Design
  • C++
Principal Digital Design Engineer
Posted 01/06/2023
Portland, OR
Allentown, PA
Full-time
$150,000.00 - $215,000.00
If you are a Principal Digital Design Engineer with experience, please read on! Job Title: Principal Digital Design Engineer Job Location: Portland, OR or Allentown, PA - relocation assistance off...
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  • UVM
  • Digital IC Design
  • RTL Design
  • Digital Verification
  • AMS Simulation
Sr. Pre-Silicon Verification Engineer
Posted 01/06/2023
Portland, OR
Allentown, PA
Full-time
$150,000.00 - $200,000.00
If you are a Sr. Pre-Silicon Verification Engineer with experience, please read on! Job Title: Sr. Pre-Silicon Verification Engineer Job Location: Portland, OR or Allentown, PA - relocation assist...
Apply Now
  • UVM
  • Pre-Silicon Verification
  • Digital Verification
  • System Verilog
  • RTL
 
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