REMOTE-Sr. Design for Test Engineer-Cadence -Modus-Genus-Xcelium

(THIS JOB IS FULLY REMOTE AND IS A FULL TIME PERMANENT POSITION WITH FULL BENEFITS AND PTO)
(THIS JOB WORKS WITH A PST TIME ZONE )
Job description:
Should have 5+ Years of the DFT experience
* Develop and support design for test (DFT) structures, Determine design for test approaches and develop DFT architecture
" Design and verify DFT structures for memories (MBIST), digital and analog circuitry
" Perform scan synthesis
" Create, simulate and verify automatic generated test patterns (ATPG)
" Create functional tests and corresponding test patterns
" Knowledgeable regarding failure mechanisms in silicon production and creating test algorithms
" Support silicon bring up of test patterns
" Perform diagnosis of test patterns on silicon and optimize test time

Tools: (MUST NO ALTERNATE OR DEVIATION FROM THE TOOL ACCEPTED)
" Cadence Modus/Genus
" Cadence Xcelium
Knowledge:
" Scan DRC review/debug
" Pattern generation (SA, TDF, Path delay etc.)
" Coverage analysis Silicon debug

- DFT
- Design for Test Engineer
- Design For Test
- Cadence Xcelium
- Cadence Modus
- Cadence Genus
- Digital
- Analog Circuitry
- Digital Circuitry