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Director of ASIC Verification - System Verilog, UVM

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San Jose, CA
Full-time $200k - $250k
Posted 06/21/2022
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If you are a Director of ASIC Verification with experience, please read on!

Job Title: Director of ASIC Verification
Job Location: San Jose, CA
Compensation: $200K - $250K base Depending on experience plus stock options

We are a small 20-person Smart Interconnect technology company focused on enabling efficient and performant composable architectures to enable flexible, scalable, low latency composable systems. We provide silicon, hardware, and software which leverages the Compute Express Link (CXL) interconnect standard to provide high-performance connectivity to a broad ecosystem of components. We are a next-generation infrastructure company addressing a $500 billion dollar market composed of on-prem, edge data center, and core data center equipment. We recently raised $17 million in a Pre-Series A round and are now rapidly expanding.

Top Reasons to Work with Us

1) Competitive Compensation ($200K - $250K base Depending on Experience)
2) Comprehensive Benefits package including stock options!
3) The chance to join a small start-up tackling challenging problems with huge upside potential!

What You Will Be Doing

- Lead the verification team, drive methodology and strategy for the verification of high performance SOCs.
- Drive the test bench architecture, test plan and test bench development for full chip and subsystem verification.
- Mentor and lead a team of verification engineers to complete unit, subsystem and chip level verification.
- Develop and maintain methodology, flows, and sign-off criteria verification team.
- Work with multi-disciplinary groups to deliver verification tests and port in tests in the lab for post silicon validation.

What You Need for this Position

Must have a BSEE / MSEE or similar degree with 15+ years experience with the following:

- Experience leading a team of Verification Engineers to complete unit, subsystem and chip level verification.
- Verification of multi-million gate ASICs with System Verilog / UVM
- Hands on experience in all aspects of the ASIC development process with proficiency in ASIC verification.
- Experience or knowledge of system architecture, CPU & IP integration, power and clock domains.
- Verification of SoC system interconnect, CPU subsystems or Networking fabrics.
- Memory controller design verification
- IP/sub-system level verification
- Should have knowledge of AMBA protocols - AXI, AHB, APB and other Management interfaces
- Networking packet based bus protocols
- Familiarity with scripting languages such as Perl, Python
So, if you are a Director of ASIC Verification with experience, please apply today! or send an updated copy of your resume to Mike.Vandenbergh@CyberCoders.com for immediate consideration!

Applicants must be authorized to work in the U.S.

Additional ways to apply

Preferred Skills

  • ASIC Verification
  • System Verilog
  • UVM
  • SoC Verification
  • System Architecture
  • CPU Subsystems
  • Networking Fabrics
  • High Performance Computing
  • Full Chip Verification
  • Subsystem Verification

Mike Vandenbergh is recruiting for this position and the positions below.
email meEmail me to apply for this position

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Your Right to Work – In compliance with federal law, all persons hired will be required to verify identity and eligibility to work in the United States and to complete the required employment eligibility verification document form upon hire.

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