# ASIC Design Engineer (RTL) 

**Job Details:**
- **Location:** San Jose, CA • Sunnyvale, CA • Mountain View, CA • Santa Clara, CA • Fremont, CA
- **Type:** Permanent
- **Salary:** $140,000 - $240,000 Annually
- **Posted 4 weeks ago**
- **Job ID:** 951874

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## Job Description

Job title: ASIC Design Engineer, RTL (Senior/Staff/Principal) Location: San Jose, CA or Colorado Springs, CO (on-site) Salary: $280k-580k total comp Help design the chips that move the world's AI data. Every AI model trained in a hyperscale data center depends on silicon that moves huge amounts of data between processors, memory and storage, with no room for delay. We design that silicon. We're lo

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