If you are a ASIC Design Engineer-Front End-Micro-architecture-RTL design with experience, please read on!
What You Will Be Doing
(THIS POSITION REPORTS TO MILPITAS 3 DAYS A WEEK AND IS PARTIAL REMOTE, SIGN ON BONUSES ARE AVAILABLE TO HELP MOVE TO THE AREA)
Responsibilities Include but are not Limited to:
" Support customers design through all phases of ASIC execution.
" Ensure designs meets product performance requirements by performing related tasks. Contribute to microarchitecture, RTL design, synthesis, and timing closure.
" Ensure deadline for project milestones are met.
" Work effectively with internal teams, including verification team, FPGA team, firmware team and physical design team.
" Display a results-focused attitude and accomplish Company/Team-goals.
Required/Desired Qualifications:
" Bachelors Degree in EE or similar degree.
" 5+ years of professional design experience, provided the work experience is solid front-end design micro-architecture work.
" Hands-on ASIC front-end design, ideally in design services environments (product backgrounds acceptable).
" Skills Required Micro-architecture at module/sub-system/chip-level; digital design of complex modules/sub-systems, with solid understanding of clock-domain crossings; integration of IPs/modules/sub-systems designed by internal/external teams; experience using AMBA bus protocols; System Verilog experience; Lint and CDC execution and analysis; writing timing constraints and timing analysis; excellent debug skills; customer support.
" Technical document writing skill
" Teamwork, dedication, collaborative, strong communications and interpersonal skills.
" Ability to meet stringent deadlines and project timelines.
" Skills Desired - Experience in at least few of these: CPU (preferably, ARM), or GPU, or DSP; low-power design and verification; peripheral interfaces such as CSI, I3C, USB, PCIe; FPGA.
What You Need for this Position
- ASIC Design Engineer
- ASIC
- ASIC Front End
- Micro-Architecture
- RTL Design
- RTL
- System Verilog
- Chip Level
- PCIe
- USB
So, if you are a ASIC Design Engineer-Front End-Micro-architecture-RTL design with experience, please apply today!
Colorado employees will receive paid sick leave. For additional information about available benefits, please contact Jonathan Gilmor
Applicants must be authorized to work in the U.S.